PCM67P_PCM69P.pdf

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®
PCM67P/U
PCM69AP/AU
Advanced 1-Bit BiCMOS Dual 18-Bit
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q
18-BIT RESOLUTION DUAL AUDIO DAC
q
EXCELLENT THD PERFORMANCE:
0.0025% (–92dB) at F/S, K Grade
1.0% (–40dB) at –60dB, K Grade
q
HIGH S/N RATIO: 110dB typ (IHF-A)
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DUAL, CO-PHASE
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SINGLE SUPPLY +5V OPERATION
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LOW POWER: 75mW typical
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CAPABLE OF 16X OVERSAMPLING
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AVAILABLE IN SPACE SAVING
16-PIN DIP OR 20-PIN SOIC
q
OPERATING TEMP RANGE:
–25
°
C to +85
°
C
q
EXTREMELY LOW GLITCH ENERGY
DESCRIPTION
The PCM67 and PCM69A dual 18-bit DAC are low
cost, dual output 18-bit BiCMOS digital-to-analog con-
verters utilizing a novel architecture to achieve excel-
lent low level performance.
By combining a conventional thin-film R-2R ladder
DAC, a digital offset technique with analog correction
and an advanced one-bit DAC using first order noise
shaping technique, the PCM67 and PCM69A achieve
high resolution, minimal glitch, and low zero-crossing
distortion.
PCM67 digital offset occurs at bit 9, making it ideal for
high-performance CD players. PCM69A digital offset
occurs at bit 4, making it an excellent choice for digital
musical instruments and audio DSP.
Both PCM67 and PCM69A operate from a single +5V
supply. The low power consumption and small size (16-
pin PDIP or 20-pin SOIC) make these converters ideal
for a variety of digital audio applications.
10-Bit DAC plus
Analog Correction
Reference
Servo
Advanced 1-Bit
DAC
Analog Output Lch
Buffer
V
COM
Lch
10-Bit DAC plus
Analog Correction
Digital Signal In
Input
Interface
Advanced 1-Bit
DAC
Buffer
V
COM
Rch
Analog Output Rch
International Airport Industrial Park • Mailing Address: PO Box 11400
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP •
© 1992 Burr-Brown Corporation
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
PDS-1168A
Printed in U.S.A. August, 1993
SPECIFICATIONS
ELECTRICAL
All specifications at +25°C and +V
A
, +V
D
= +5V unless otherwise noted
PCM67/69A
PARAMETER
RESOLUTION
DYNAMIC RANGE,
THD+N at –60dB Referred to Full Scale
DIGITAL INPUT
Logic Family
Logic Level: V
IH
V
IL
Data Format
Input System Clock Frequency
TOTAL HARMONIC DISTORTION + N
(2,3,4)
PCM67P/69AP, PCM67U/69AU
f = 991Hz (0dB)
f = 991Hz (–20dB)
f = 991Hz (–60dB)
PCM67P-J/69AP-J, PCM67U-J/69AU-J
f = 991Hz (0dB)
f = 991Hz (–20dB)
f = 991Hz (–60dB)
PCM67P-K/69AP-K, PCM67U-K/69AU-K
f = 991Hz (0dB)
f = 991Hz (–20dB)
f = 991Hz (–60dB)
CHANNEL SEPARATION
ACCURACY
Level Linearity
Gain Error
Gain Mismatch, Channel-to-Channel
Gain Drift
Warm-up Time
IDLE CHANNEL SNR
(5)
ANALOG OUTPUT
Output Range (±3%)
Output Impedance (±30%)
V
COM
Glitch Energy
POWER SUPPLY REQUIREMENTS,
System Clock = 16.9344MHz
+V
A
, +V
D
Supply Voltage Range
+V
A
= +V
D
+I
A
, +I
D
Combined Supply Current
+V
A
, +V
D
= +5V
Power Dissipation
+V
A
, +V
D
= +5V
TEMPERATURE RANGE
Operating
Storage
CONDITIONS
MIN
TYP
18
106
MAX
UNITS
Bits
dB
TTL/CMOS Compatible
I
IH
=
±5µA
I
IL
=
±5µA
+2
0
Serial, MSB First, BTC
(1)
16.9344
+V
D
0.8
V
V
MHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
f
S
= 352.8kHz
(f = 1kHz)
–86
–68
–40
–91
–72
–46
–95
–74
–46
106
±1
±3
±1
95
1
110
–82
–34
–88
–40
–92
–40
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
at –90dB Signal Level
±10
±5
0°C to +70°C
20Hz to 40kHz at BPZ
(6)
dB
%
%
ppm/°C
Minute
dB
3.35
1.2
1.8
3.50
No Glitch Around Zero
3.65
mA
kΩ
V
+4.75
+5.00
15
75
+5.25
20
105
V
mA
mW
°C
°C
–25
–55
+85
+100
NOTES: (1) Binary Two’s Complement coding. (2) Ratio of (Distortion
RMS
+ Noise
RMS
)/Signal
RMS
. (3) D/A converter output frequency/signal level (both left and right
channels are “on”). (4) D/A converter sample frequency (8 x 44.1kHz; 8X oversampling per channel). (5) Ratio of Noise
RMS
/Signal
RMS
. Measured using a 40kHz
3rd-order GIC (Generalized Immittance Converter) filter and an A-weighted filter. (6) Bipolar Zero.
USA OEM PRICES
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
PCM67/69A
2
PIN ASSIGNMENTS
PCM67P
PCM67U
DESCRIPTION
+5V Analog Supply Voltage
Left Voltage Common
No Connection
Left Current Output (0 to 1.2mA)
Servo Decoupling Capacitor
Reference Decoupling Capacitor
Right Current Output (0 to 1.2mA)
No Connection
Right Voltage Common
Analog Common
Digital Common
Mode Control 2
Right Data Input
Bit Clock
System Clock
Word Clock
Left Data Input
Mode Control 3
Mode Control 1
+5V Digital Supply Voltage
MNEMONIC
+V
A
LV
COM
NC
LI
OUT
SRVCAP
REFCAP
RI
OUT
NC
RV
COM
ACOM
DCOM
MC2
RDATA
BTCK
SYSCK
WDCK
LDATA
MC3
MC1
+V
D
PCM69AP PCM69AU
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ABSOLUTE MAXIMUM RATINGS
+V
A
, +V
D
to ACOM, DCOM ................................................... 0V to +6.5V
ACOM to DCOM ...............................................................................
±0.5V
Digital Inputs to DCOM ............................................ –0.3V to +V
D
+ 0.3V
Power Dissipation ................ 300mW (U Package), 500mW (P Package)
Lead Temperature, (soldering, 10s) .............................................. +260°C
Max Junction Temperature ............................................................ +165°C
NOTE: Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per-
formance degradation to complete device failure. Burr-Brown
Corporation recommends that all integrated circuits be handled
and stored using appropriate ESD protection methods.
PACKAGE INFORMATION
MODEL
PCM67P/69AP
PCM67U/69AU
PACKAGE
16-Pin Plastic DIP
20-Pin SOIC
PACKAGE DRAWING
NUMBER
(1)
180
248
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
®
3
PCM67/69A
PIN CONFIGURATION — PCM67P/69AP (16-Pin DIP)
Data-L
WDCK
SYS CLOCK
BCK
Data-R
1µF
16
15
14
13
12
11
10
9
PCM67P/69AP
+V
CC
(+5V)
1
10µF
2
3
4
5
6
7
8
3.3µF
R
NF
3.3µF
R
NF
10µF
Lch
OUT
10µF
Rch
OUT
PIN CONFIGURATION — PCM67U/69AU (20-Pin SOIC)
Data-L
WDCK
SYS CLOCK
BCK
Data-R
1µF
20
19
18
17
16
15
14
13
12
11
PCM67U/69AU
+V
CC
(+5V)
1
10µF
2
3
4
5
6
7
8
9
10
3.3µF
R
NF
3.3µF
R
NF
10µF
Lch
OUT
10µF
Rch
OUT
®
PCM67/69A
4
TYPICAL PERFORMANCE CURVES
All specifications at +25°C and V
CC
= +5.0V unless otherwise noted.
THD vs POWER SUPPLY VOLTAGE
0.01%
–60dB
0.005%
0.5%
1.0%
3
2
GAIN ERROR / V
COM
vs POWER SUPPLY
3.70
Gain Error (%)
THD (–60dB)
1
0
–1
V
COM
–2
THD (F/S)
F/S
0.002%
0.2%
3.50
0.001%
4.75
5.0
V
CC
(V)
0.1%
5.25
–3
4.75
5.0
V
CC
(V)
3.40
5.25
THD vs TEMPERATURE
0.01%
–60dB
2
GAIN ERROR / V
COM
vs TEMPERATURE
1.0%
3
3.70
THD (–60dB)
Gain Error (%)
0.005%
0.5%
F/S
1
0
–1
–2
3.60
THD (F/S)
0.002%
0.2%
3.50
0.001%
–25
0
25
50
85
Temperature (°C)
0.1%
100
–3
–25
0
25
50
75 85
Temperature (%)
3.40
100
THD vs SYSTEM CLOCK FREQUENCY
0.01%
fs = 44.1kHz
–60dB
Separation (dB)
CHANNEL SEPARATION vs SIGNAL FREQUENCY
1.0%
115
0.005%
THD (F/S)
0.5%
THD (–60dB)
110
105
F/S
0.002%
0.2%
100
0.001%
384
192
fs (Hz)
96
48
0.1%
95
100
500
1k
f (Hz)
2k
4k
8k 16k … 128k
5
PCM67/69A
V
COM
(V)
®
V
COM
(V)
Gain Error
3.60
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