Digital Systems - Chapter13.pdf

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CHAPTER 13
PROGRAMMABLE
LOGIC DEVICE
ARCHITECTURES*
OUTLINE
13-1
Digital Systems Family Tree
13-5
The Altera EPM7128S
CPLD
13-2
Fundamentals of PLD
Circuitry
13-6
The Altera FLEX10K
Family
13-3
PLD Architectures
13-7
The Altera Cyclone Family
13-4
The GAL 16V8 (Generic
Array Logic)
*Diagrams of the GAL 16V8 device presented in this chapter have been reproduced through the cour-
tesy of Lattice Semiconductor Corporation, Hillsboro, Oregon.
Diagrams of the MAX7000S and FLEX10K family devices presented in this chapter have been repro-
duced through the courtesy of Altera Corporation, San Jose, California.
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OBJECTIVES
Upon completion of this chapter, you will be able to:
Describe the different categories of digital system devices.
Describe the different types of PLDs.
Interpret PLD data book information.
Define PLD terminology.
Compare the different programming technologies used in PLDs.
Compare the architectures of different types of PLDs.
Compare the features of the Altera MAX7000S and FLEX10K families
of PLDs.
INTRODUCTION
Throughout the chapters of this book you have been introduced to a wide
variety of digital circuits. You now know how the building blocks of digital
systems work and can combine them to solve a wide variety of digital
problems. More complicated digital systems, such as microcomputers and
digital signal processors, have also been briefly described. The defining
difference between microcomputer/DSP systems and other digital systems
is that the former follow a programmed sequence of instructions that the
designer specifies. Many applications require faster response than a
microcomputer/DSP architecture can accommodate and in these cases, a
conventional digital circuit must be used. In today’s rapidly advancing
technology market, most conventional digital systems are not being
implemented with standard logic device chips containing only simple gates
or MSI-type functions. Instead, programmable logic devices, which contain
the circuitry necessary to create logic functions, are being used to imple-
ment digital systems. These devices are not programmed with a list of
instructions, like a computer or DSP. Instead, their internal hardware is
configured by electronically connecting and disconnecting points in the
circuit.
Why have PLDs taken over so much of the market? With programmable
devices, the same functionality can be obtained with one IC rather than
using several individual logic chips. This characteristic means less board
space, less power required, greater reliability, less inventory, and overall
lower cost in manufacturing.
In the previous chapters you have become familiar with the process of
programming a PLD using either AHDL or VHDL. At the same time, you
have learned about all the building blocks of digital systems. The PLD
implementations of digital circuits up to this point have been presented as
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C HAPTER 13/ P ROGRAMMABLE L OGIC D EVICE A RCHITECTURES
a “black box.” We have not been concerned with what was going on inside
the PLD to make it work. Now that you understand all the circuitry inside
the black box, it is time to turn the lights on in there and look at how it
works. This will allow you to make the best decisions when selecting and
applying a PLD to solve a problem. This chapter will take a look at the
various types of hardware available to design digital systems. We will then
introduce you to the architectures of various families of PLDs.
13-1
DIGITAL SYSTEMS FAMILY TREE
While the major goal of this chapter is to investigate PLD architectures, it is
also useful to look at the various hardware choices available to digital system
designers because it should give us a little better perception of today’s digital
hardware alternatives. The desired circuit functionality can generally be
achieved by using several different types of digital hardware. Throughout this
book, we have described both standard logic devices as well as how program-
mable logic devices can be used to create the same functional blocks.
Microcomputers and DSP systems can also often be applied with the neces-
sary sequence of instructions (i.e., the application’s program) to produce the
desired circuit function. The design engineering decisions must take into ac-
count many factors, including the necessary speed of operation for the circuit,
cost of manufacturing, system power consumption, system size, amount of
time available to design the product, etc. In fact, most complex digital designs
include a mix of different hardware categories. Many trade-offs between the
various types of hardware have to be weighed to design a digital system.
A digital system family tree (see Figure 13-1) showing most of the hard-
ware choices that are currently available can be useful in sorting out the
many categories of digital devices. The graphical representation in the figure
does not show all the details—some of the more complex device types have
many additional subcategories, and older, obsolete device types have been
omitted for clarity. The major digital system categories include standard
logic, application-specific integrated circuits (ASICs) and microprocessor/
digital signal processing (DSP) devices.
Digital
systems
Standard
logic
Microprocessors
and DSP
ASICs
Gate
arrays
Standard
cell
Full
custom
TTL
CMOS
ECL
PLDs
SPLDs
CPLDs
HCPLDs
FPGAs
Fuse
EPROM
EEPROM
EPROM
EEPROM
Flash
SRAM
Flash
Antifuse
FIGURE 13-1
Digital system family tree.
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S ECTION 13-1/ D IGITAL S YSTEMS F AMILY T REE
The first category of standard logic devices refers to the basic functional
digital components (gates, flip-flops, decoders, multiplexers, registers, coun-
ters, etc.) that are available as SSI and MSI chips. These devices have been used
for many years (some more than 30 years) to design complex digital systems.
An obvious drawback is that the system may literally consist of hundreds of
such chips. These inexpensive devices can still be useful if our design is not
very complex. As discussed in Chapter 8, there are three major families of stan-
dard logic devices: TTL, CMOS, and ECL. TTL is a mature technology consist-
ing of numerous subfamilies that have been developed over many years of use.
Very few new designs apply TTL logic, but many, many digital systems still con-
tain TTL devices. CMOS is the most popular standard logic device family today,
primarily due to its low power consumption. ECL technology, of course, is ap-
plied for higher-speed designs. Standard logic devices are still available to the
digital designer, but if the application is very complex, a lot of SSI/MSI chips
will be needed. That solution is not very attractive for our design needs today.
The microprocessor/digital signal processing (DSP) category is a much dif-
ferent approach to digital system design. These devices actually contain the
various types of functional blocks that have been discussed throughout this
text. With microcomputer/DSP systems, devices can be controlled electroni-
cally, and data can be manipulated by executing a program of instructions that
has been written for the application. A great deal of flexibility can be
achieved with microcomputer/DSP systems because all you have to do is
change the program. The major downfall with this digital system category is
speed. Using a hardware solution for your digital system design is always faster
than a software solution.
The third major digital system category is called application-specific
integrated circuits (ASICs) . This broad category represents the modern
hardware design solution for digital systems. As the acronym implies, an in-
tegrated circuit is designed to implement a specific desired application.
Four subcategories of ASIC devices are available to create digital systems:
programmable logic devices, gate arrays, standard-cell, and full-custom.
Programmable logic devices (PLDs) , sometimes referred to as field-
programmable logic devices (FPLDs), can be custom-configured to create any
desired digital circuit, from simple logic gates to complex digital systems.
Many examples of PLD designs have been given in earlier chapters. This ASIC
choice for the designer is very different from the other three subcategories.
With a relatively small capital investment, any company can purchase the nec-
essary development software and hardware to program PLDs for their digital
designs. On the other hand, to obtain a gate array, standard-cell or full-custom
ASIC requires that most companies contract with an IC foundry to fabricate
the desired IC chip. This option can be extremely expensive and usually re-
quires that your company purchase a large volume of parts to be cost effective.
Gate arrays are ULSI circuits that offer hundreds of thousands of gates. The
desired logic functions are created by the interconnections of these prefabri-
cated gates. A custom-designed mask for the specific application determines
the gate interconnections, much like the stored data in a mask-programmed
ROM. For this reason, they are often referred to as mask-programmed gate
arrays (MPGAs). Individually, these devices are less expensive than PLDs of
comparable gate count, but the custom programming process by the chip
manufacturer is very expensive and requires a great deal of lead time.
Standard-cell ASICs use predefined logic function building blocks called
cells to create the desired digital system. The IC layout of each cell has been
designed previously, and a library of available cells is stored in a computer
database. The needed cells are laid out for the desired application, and
the interconnections between the cells are determined. Design costs for
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C HAPTER 13/ P ROGRAMMABLE L OGIC D EVICE A RCHITECTURES
standard-cell ASICs are even higher than for MPGAs because all IC fabrica-
tion masks that define the components and interconnections must be custom
designed. Greater lead time is also needed for the creation of the additional
masks. Standard cells do have a significant advantage over gate arrays. The
cell-based functions have been designed to be much smaller than equivalent
functions in gate arrays, which allows for generally higher-speed operation
and cheaper manufacturing costs.
Full-custom ASICs are considered the ultimate ASIC choice. As the name
implies, all components (transistors, resistors, and capacitors) and the inter-
connections between them are custom-designed by the IC designer. This
design effort requires a significant amount of time and expense, but it can
result in ICs that can operate at the highest possible speed and require the
smallest die (individual IC chip) area. Smaller IC die sizes allow for many
more die to fit on a silicon wafer, which significantly lowers the manufactur-
ing cost for each IC.
More on PLDs
This chapter is mainly about PLDs, so we will look a little further down that
branch of the family tree. The development of PLD technology has advanced
continuously since the first PLDs appeared more than 30 years ago. The early
devices contained the equivalent of a few hundred gates, and now we have
parts available that contain a few million gates. The old devices could han-
dle a few inputs and a few outputs with limited logic capabilities. Now there
are PLDs that can handle hundreds of inputs and outputs. Original devices
could be programmed only once and, if the design changed, the old PLD
would have to be removed from the circuit and a new one, programmed with
the updated design, would have to be inserted in its place. With newer de-
vices, the internal logic design can be changed on the fly, while the chip is
still connected to a printed circuit board in an electronic system.
Generally, PLDs can be described as being one of three different types:
simple programmable logic devices (SPLDs), complex programmable logic
devices (CPLDs) , or field programmable gate arrays (FPGAs) . There are sev-
eral manufacturers with many different families of PLD devices, so there are
many variations in architecture. We will attempt to discuss the general char-
acteristics for each of the types, but be forewarned: the differences are not
always clear-cut. The distinction between CPLDs and FPGAs is often a little
fuzzy, with the manufacturers constantly designing new, improved architec-
tures and frequently muddying the waters for marketing purposes. Together,
CPLDs and FPGAs are often referred to as high-capacity programmable logic
devices (HCPLDs) . The programming technologies for PLD devices are actu-
ally based on the various types of semiconductor memory. As new types of
memory have been developed, the same technology has been applied to the
creation of new types of PLD devices.
The amount of logic resources available is the major distinguishing feature
between SPLDs and HCPLDs. Today, SPLDs are devices that typically contain
the equivalent of 600 or fewer gates, while HCPLDs have thousands and hun-
dreds of thousands of gates available. Internal programmable signal intercon-
nect resources are much more limited with SPLDs. SPLDs are generally much
less complicated and much cheaper than HCPLDs. Many small digital applica-
tions need only the resources of an SPLD. On the other hand, HCPLDs are ca-
pable of providing the circuit resources for complete complex digital systems,
and larger, more sophisticated HCPLD devices are designed every year.
The SPLD classification includes the earliest PLD devices. The amount of
logic resources contained in the early PLDs may be relatively small by today’s
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